1. Technical Field
The present invention relates to an external signal detection circuit and a real-time clock.
2. Related Art
A real-time clock is a piezoelectric device that creates digital data, including that indicating time-of-day, date, and the like, from a clock signal. Some of such a real-time clock include an input port of an external signal, in which a signal from an external environment (an external signal) is inputted so that the external signal can be supplied to a central processing unit (CPU), an arithmetic circuit, or the like. The real-time clock herein corresponds to an electronic apparatus mounted with a real-time clock, the electronic device operating in negative logic or positive logic, as the case may be, with a pull-up resistor or a pull-down resistor connected to the input port.
FIG. 3 is diagram illustrating a pull-up resistor and a pull-down resistor connected to an input port. A pull-up resistor 3 is connected to an input port 1 via a first switch portion 2 and a pull-down resistor 5 is connected to the input port 1 via a second switch portion 4. Further, an external circuit 6 is connected to the input port 1. When the first switch portion 2 connected in series with the pull-up resistor 3 is turned on (closed), current flows from a power source Vdd to the external circuit 6 via the input port 1 as shown by an arrow B of FIG. 3. If the first switch portion 2 is kept on, the current continues flowing to consume an electric power.
JP-A-7-325780 is an example of related art. JP-A-7-325780 discloses an arrangement, in which an input/output port of a microprocessor includes an output mode setting MOS transistor connected to a power source, and an operation switch is interposed between an input/output pin and the power source. A CPU reads a switching program from a program memory to control operations of the output mode setting MOS transistor and to operate the operation switch. A leak current is thereby prevented from flowing to suppress power consumption.
If an electronic apparatus is formed by connecting the pull-up resistor 3 and the pull-down resistor 5 to the input port 1 and further connecting the input port 1 to the external circuit 6, and if the pull-up resistor 3 is kept connected to the input port 1, current continues flowing as shown by the arrow B in FIG. 3, resulting in wasteful consumption of power, as described above. Should the electronic apparatus mounted with a real-time clock operate on a battery, the battery would have a shorter service life. An example of a condition, in which such a wasteful current flows, includes an electronic apparatus constituting a switch for a remote control or the like, the switch being kept on for an unnecessarily long period of time.
To prevent the wasteful current shown by the arrow B in FIG. 3 from flowing, it is possible to provide an on/off control of the switch connected in series with the pull-up resistor 3 or the pull-down resistor 5, thereby restricting connection of the pull-up resistor 3 to the input port 1 and thus restricting connection of the power source Vdd to the external circuit 6. If this restricting operation is controlled by a central processing unit (CPU) by using software or an external circuit, load is imposed on the software and the like. Specifically, this results in increased occupancy of CPU resources. As a result, system performance is impaired and power consumption of the CPU itself increases.
Further, the following problem arises when the external signal inputted to the input port 1 is to be detected. FIGS. 4A and 4B are views for illustrating a case, in which the external circuit has a line capacity. Herein, FIG. 4A is a circuit block diagram and FIG. 4B is a diagram showing a relation between time and an input port voltage. A case is to be herein considered, in which the first switch portion 2 is connected in series with the pull-up resistor 3 and the first switch portion 2 is controlled to be turned on or off so as to restrict connection of the pull-up resistor 3 to the input port 1, and so as to detect a HIGH signal (external signal) inputted to the input port 1. If the external circuit 6 connected to the input port 1 has a large line capacity, connecting the pull-up resistor 3 to the input port 1 by turning on the first switch portion 2 immediately before an input detection timing causes a voltage level at the input port 1 (input port voltage) to build up gradually. Specifically, it takes time for the voltage to build up, or the voltage at the input port 1 does not go HIGH immediately. Accordingly, the voltage does not build up sufficiently at a timing (input detection timing) at which it is determined whether or not the external signal has been inputted to the input port 1. The related art technique therefore involves a problem in that the voltage at the input port 1 is lower than a H/L threshold established for determining if the voltage is a HIGH or LOW level, resulting in an erroneous detection of a LOW level.